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ARM ARM926EJ-S manuals

Owner’s manuals and user’s guides for Processors ARM ARM926EJ-S.
We providing 3 pdf manuals ARM ARM926EJ-S for download free by document types: User Manual, Specifications, User's Guide


Arm ARM926EJ-S User Manual (67 pages)


Brand: Arm | Category: Processors | Size: 0.49 MB |

 

Table of contents

LPC3130/3131

1

Arm ARM926EJ-S Specifications (332 pages)


Brand: Arm | Category: Processors | Size: 2.29 MB |

 

Table of contents

ARM926EJ-S Development Chip

1

CE Declaration of Conformity

3

Contents

5

List of Tables

10

List of Figures

13

• Feedback on page xxiii

17

About this document

18

Preface

19

Feedback

23

Chapter 1

27

Introduction

27

Platform

28

ARM926EJ-S PXP

29

Subsystem

29

1.2 Functional description

30

1.3 External interfaces

35

0x00000000

37

0x70000000

37

0x20000000

37

0x30000000

37

ARM D bus

38

Chapter 2

41

0x101E0000

42

2.2 Clock control

53

Figure 2-5

54

2.4 JTAG logic

65

Chapter 3

75

$50(-6'HY&KLS

81

2IIFKLS$+%EULGJH

81

%XVPDWUL[

82

1xxx x00

84

0 001-111 x 01

84

0000 010

84

0000 111

84

+5($'<6,1

87

+5($'<2876287

87

3.2 Memory map options

89

Configuration

90

PWP System

90

Controller

90

0x80000000

94

0x03FFFFFF

99

• REMAPSTATIC HIGH

101

3.2.6 APB address maps

103

3.2.7 MBX memory map

105

Figure 3-20

105

3.3 AHB signals to pads

106

Controllers and Peripherals

109

Chapter 4

111

AHB Monitor

111

4.1 About the AHB monitor

112

4.2 Functional description

113

89181922232829 332

114

0x101D0000

121

4.3 AHB Monitor registers

133

CtArmdBurstIncr8

142

CtDma0BurstIncr8

142

CtDma1BurstIncr8

142

CtClcdBurstIncr8

142

CtExpBurstIncr8

142

CtGxiRdAddrWait

147

CtGxiRdDataWait

147

4.3.33 AHBMONPeriphID 0 to 3

150

4.3.34 AHBMONPCellID

151

It is set at the value of

151

Chapter 5

153

Color LCD Controller (CLCDC)

153

5.1 About the CLCDC

154

5.2 Functional description

156

ARM926EJ-S Dev. Chip

157

32 32 2 2 64

160

64 64 2 4 256

160

ClcdCrsrXY(X)

161

ClcdCrsrXY(Y)

161

0x10120800

163

Cursor0

164

Undefined

170

31 6543 10

170

CrsrNumber[1:0]

170

CrsrFrameSync

172

CrsrSize

172

CrsrY Undefined CrsrX

173

31 14 13 8 7 6 5 0

174

CrsrClipY CrsrClipX

174

0xFE0-0xFEC

179

0xFF0-0xFFC

181

5.4 CLCD signals on pads

183

Chapter 6

185

MOVE Coprocessor

185

Figure 6-1 MOVE overview

187

Chapter 7

189

MBX HR-S Graphics Accelerator

189

0x40000000

190

7.2 Memory map and registers

194

Translation table in

196

Static registers

196

Chapter 8

197

0x10130000

198

8.2 Functional description

200

8.3 DMA signals on pads

203

Chapter 9

205

0x101E4000

206

0x101E5000

206

0x101E6000

206

0x101E7000

206

9.2 Functional description

207

9.3 GPIO signals on pads

209

Chapter 10

211

0x10110000

212

10.3 MPMC signals on pads

218

Chapter 11

221

Real-Time Clock (RTC)

221

0xFFFFFFFF

222

11.2 Functional description

223

Chapter 12

225

Smart Card Interface (SCI)

225

12.1 About the ARM SCI

226

12.2 Functional description

228

12.3 SCI signals on pads

230

Chapter 13

231

0x10100000

232

13.2 Functional description

235

ARM926EJ-S

235

Dev. Chip

235

GX175 MPMC

236

PL093 SSMC

236

Multiplex

236

13.2.1 Implementation details

238

13.3 SSMC signals on pads

239

Chapter 14

241

Synchronous Serial Port (SSP)

241

0x101F4000

242

14.2 Functional description

244

14.3 SSP signals on pads

246

Chapter 15

247

Dual Timer/Counters

247

0x101E2000

248

0x101E3000

248

15.2 Functional description

249

AMBA APB

250

Interface

250

Clock control

250

Chapter 16

253

UART Controller

253

0x101F1000

254

0x101F2000

254

0x101F3000

254

16.2 Functional description

256

16.3 UART signals on pads

260

Chapter 17

263

0x10140000

264

17.2 Functional description

266

0xFFFFF000

271

17.2.9 Implementation details

272

17.3 VIC signals on pads

273

Chapter 18

275

18.4 Modes of operation

280

Chapter 19

283

Watchdog Timer

283

0x101E1000

284

19.2 Functional description

285

0x101E1018

286

0x101E1BFC

286

0x101E1F08

286

0x101E1FDC

286

Appendix A

287

Signals on Pads

287

A.1 Pad signals by function

288

Appendix B

319

B.1 Mechanical details

320

B.2 Electrical specification

321

Table B-3 Power estimate

322

Description Power

322

Total I/O Power 3.5W

322

Total 4.5 W

322

Appendix C

323

Timing Specification

323

Reference clock

324

Output signals from

324

Input signals to

324

C.2 AHB bus timing

325

C.3 Memory timing

326

C.4 Peripheral timing

327

Arm ARM926EJ-S User's Guide (402 pages)


Brand: Arm | Category: Processors | Size: 4.26 MB |

 

Table of contents

ARM926EJ-S

1

CE Declaration of Conformity

4

Contents

5

List of Tables

10

List of Figures

13

User Guide

13

• Feedback on page xxv

17

About this manual

18

Preface

19

Feedback

25

Chapter 1

27

Introduction

27

1.1 About the PB926EJ-S

28

Figure 1-1 PB926EJ-S layout

29

1.2 PB926EJ-S architecture

30

PB926EJ-S

32

1.3 Precautions

35

Chapter 2

37

Getting Started

37

2.2.2 LED indicators

41

SET BOOTSCRIPT

43

Figure 2-2 JTAG connection

44

2.5 Supplying power

49

Q, quit, qui, qu, or q

50

Release_ARM_Little_Endian

55

Chapter 3

63

• USB interface on page 3-92

64

• UART interface on page 3-88

64

0xFFFF0000

69

Figure 3-4 AHB map

75

Figure 3-6 Memory devices

77

3.2 FPGA

79

0x200000

81

0x400000

81

0x600000

81

Progcards

83

3.3 Reset controller

84

3.3.4 Reset signals

91

3.4 Power supply control

95

3.5 Clock architecture

97

Hardware Description

100

ARM926EJ-S Dev. Chip

101

Schematics

116

Figure 3-24 Audio interface

119

3.7 Character LCD controller

121

Figure 3-25 Character display

122

3.8 CLCDC interface

123

Figure 3-26 Display interface

124

Figure 3-27 DMA channels

128

3.10 Ethernet interface

130

3.11 GPIO interface

133

3.12 Interrupts

134

Figure 3-31 KMI block diagram

136

Figure 3-32 MMI interface

139

3.15 PCI interface

141

3.16 Serial bus interface

142

Figure 3-35 SCI block diagram

144

Figure 3-36 SSP block diagram

146

3.19 User switches and LEDs

149

3.20 UART interface

150

Figure 3-39 UART0 interface

151

Reference Manual

152

3.21 USB interface

154

TransDimension OTG243

155

Chapter 4

167

Programmer’s Reference

167

4.1 Memory map

169

Development Chip

173

0x101E0000

177

0x34000000–0x37FFFFFF

177

Booting from NOR flash 1

178

LOW) are shown in Figure 4-3

179

Memory banks

182

0x10000000

183

0x10000004

187

4.3.3 LED Register, SYS_LED

188

Use the SYS_LED register at

188

0x1000000C

189

0x1000001C

189

0x0000A05F

189

0x10000020

190

Figure 4-10 SYS_CFGDATA1

191

SYS_CFGDATA2 at address

192

0x10000040

197

0x10000044

197

0x10000048

197

0x1000004C

198

0x10000050

198

0x10000054

200

0x10000058

200

0x1000005C

202

0x10000060

202

0x10000064

203

0x10000068

203

0x1000006C

203

0x1000008C

205

0x1000009C

205

0x100000C0

206

0x100000C4

206

0x100000C8

206

0x100000CC

206

0x100000D0

206

0x101D0000

207

0x10004000

208

0x10008000

210

0x10120000

213

0x10130000

218

0x10010000

221

0x101E4000

222

0x101E5000

222

0x101E6000

222

0x101E7000

222

0x101E8000

222

0x10140000

223

0x10003000

223

0x10003020

228

0x10003024

228

PIC_SCR31

231

// . .

232

0x10006000

233

0x10007000

233

0x40000000

234

4.14 MOVE video coprocessor

235

0x10005000

236

0x1000B000

236

0x10110000

237

4.17 PCI controller

240

0x41000000

241

0x6FFFFFFF

241

0x10001010

242

0x10001014

242

0x10001018

242

0x1000101C

242

PCI_SMAPx registers

244

4.17.2 PCI configuration

245

0x42000000

246

0x10002000

252

0x10002004

252

0xA0 0xA1

253

0xA2 0xA3

253

0xD0 0xD1

253

0x101F0000

254

0x1000A000

254

0x101F4000

255

0x10100000

257

0x303121

260

0x101E000

261

0x101E2000

262

0x101E2020

262

0x101E3000

262

0x101E3020

262

0x101F1000

263

0x101F2000

263

0x101F3000

263

0x10009000

263

0x10020000

265

0x10020080

265

0x10020100

265

0x101E1000

267

Appendix A

269

Signal Descriptions

269

A.2 Smart Card interface

271

A.3 UART interface

273

A.4 USB interface

274

A.5 Audio CODEC interface

275

Figure A-8 MMC card

276

A.7 CLCD display interface

278

A.8 VGA display interface

281

A.9 GPIO interface

282

A.11 Ethernet interface

284

A.12.2 HDRY signals

290

A.12.3 HDRZ

294

2 USBDM

304

3 USBDP

304

A.13.4 Trace connector pinout

305

SSP connector

306

Appendix B

309

Specifications

309

B.1 Electrical specification

310

B.2 Clock rate restrictions

313

B.2.1 AHB bus timing

314

35MHz for a

314

of 28.5ns)

314

B.3 Mechanical details

317

Appendix C

319

Enable V+

328

Selftest

329

Y positions

330

C.4 Connectors

333

C.5 Mechanical layout

337

Appendix D

339

PCI Backplane and Enclosure

339

PCI controller on page 4-74)

341

D.2 Backplane hardware

344

D.2.1 JTAG signals

347

D.3 Connectors

348

D.3.3 JTAG connector

350

Appendix E

351

Memory Expansion Boards

351

Expansion connector J13

352

Expansion connector

353

E.2 Fitting a memory board

355

E.3 EEPROM contents

356

Contents Contents

358

E.4 Connector pinout

363

E.5 Mechanical layout

370

Appendix F

371

RealView Logic Tile

371

F.3 Header connectors

374

Clock generators and crystals

380

0x14000000

382

0x1F000000

382

Appendix G

385

ARM-ARM-DIR

389

VPB926EJ-S USB

389

G.4.1 Global Properties

395

G.4.2 Device Properties

396

G.4.3 Semihosting Properties

397




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