ARM ARM PL241 Specifications download pdf (Page 97)

Signal Descriptions

A.2 Clocks and resets

Table A-1 lists the clock and reset signals.

Table A-1 Clocks and resets

Name Type

Source/

destination

Description

hclk Input Clock source AHB clock

hresetn Input Reset source AHB clock domain reset

smc_aclk Input Clock source SMC AHB clock

smc_mclk0 Input Clock source SMC memory clock

smc_mclk0n Input Clock source SMC inverted memory clock

smc_mreset0n Input Reset source SMC memory clock domain reset

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ARM ARM PL241 Specifications Page 97