ARM Cortex-M3 manuals

Arm Cortex-M3 Specifications (21 pages)

Brand: Arm | Category: Processors | Size: 0.09 MB |

English

Table of contents

ARM Core

1

Errata Notice

1

Proprietary notice

2

Web address

2

Feedback on the product

3

Feedback on this document

3

Contents

4

Introduction

5

Errata Summary Table

7

Implications

10

Workaround

10

Description

11

Conditions

12

IMPORTANT NOTICE

21

Arm Cortex-M3 User's Guide (137 pages)

Brand: Arm | Category: Processors | Size: 1.06 MB |

English

Table of contents

Technical Reference Manual

1

Cortex-M3

2

Contents

3

List of Tables

5

List of Figures

7

• About this book on page x

9

• Feedback on page xiii

9

About this book

10

Preface

11

Other publications

12

Feedback

13

Chapter 1

14

Introduction

14

1.1 About the processor

15

1.2 Features

16

1.3 Interfaces

17

1.4 Configurable options

18

1.5 Product documentation

19

1.6 Product revisions

22

0xE000ED14

23

Chapter 2

25

Functional Description

25

2.1 About the functions

26

2.2 Interfaces

28

Chapter 3

31

Programmers Model

31

3.3 Instruction set summary

34

— STKALIGN bit to 1

40

— UNALIGN_TRP bit to 1

40

3.4 System address map

41

LDRH, STR, STRH

42

3.5 Write buffer

44

3.6 Exclusive monitor

45

3.7 Bit-banding

46

Figure 3-2 Bit-band mapping

47

3.9 Exceptions

50

Chapter 4

52

System Control

52

4.1 About system control

53

4.2 Register summary

54

4.3 Register descriptions

56

Chapter 5

58

Memory Protection Unit

58

5.1 About the MPU

59

5.3 MPU programmers model

61

Chapter 6

62

6.1 About the NVIC

63

6.3 NVIC programmers model

65

Chapter 7

67

7.1 About debug

68

0xE000ED00

69

0xE00FF000

70

7.2 About the AHB-AP

72

7.3.2 FPB programmers model

76

Chapter 8

77

8.1 About the DWT

78

8.3 DWT Programmers Model

80

0x40000000

81

0x4F000000

81

0x10000000

81

0x1F000000

81

Chapter 9

82

9.1 About the ITM

83

9.3 ITM programmers model

85

PRIVMASK

86

Chapter 10

87

10.1 About the ETM

88

Figure 10-1 ETM block diagram

89

10.2.9 Operation

94

10.3 ETM Programmers model

95

Embedded Trace Macrocell

100

ID072410 Non-Confidential

100

Reserved

102

26 25 24

102

Trace control enable

102

Reserved, RAZ

106

ETM powered up

106

TRIGGER output value

107

Chapter 11

109

Trace Port Interface Unit

109

11.1 About the Cortex-M3 TPIU

110

11.3 TPIU programmers model

113

TRIGGER input value

116

Appendix A

122

Revisions

122

Glossary

129

0x00000000

132

0x1FFFFFFFF

132

0xE0040000

133

0xE00FFFFF

133

0x1FFFFFFF

133

0xE0000000

134

0xE003FFFF

134

Arm Cortex-M3 User Manual (41 pages)

Brand: Arm | Category: Processors | Size: 2.06 MB |

English

Table of contents

ARM Cortex

1

Introduction

1

M3 Processor

4

M3 Microcontroller

5

ARM and Thumb Performance

7

The Thumb

8

2 instruction set

8

M3 Register Set

10

Program Status Register

11

An Example AMBA System

12

Memory Map

13

Processor Privilege

16

Memory Protection Unit (MPU)

17

0x02000000

18

Word alias

19

Physical bit

19

Conditional Execution

20

Interrupt Handling

21

Exception Handling

22

Power Management

23

M3 Debug

24

M3 Datapath

26

M3 Pipeline

27

Optimal Pipelining

28

Branch Pipeline Example

29

LDR Pipeline Example

30

STR Pipeline Example

31

M3 Development Platforms

35

Rapid Prototyping

36

Documentation

39

University Resources

40

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