ARM Cortex-M3 User Manual Page 28

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28
Cycle
Operation
ADD
SUB
ORR
AND
EOR
ORR
Optimal Pipelining
All operations here are on registers (single cycle execution)
In this example it takes 6 clock cycles to execute 6 instructions
Clock cycles per Instruction (CPI) = 1
1
2
3
4
5
6
7
8
9
F
D
E
F
D
E
F
E
F
D
E
F
D
E
D
F
D
E
F
-
Fetch
D
-
Decode
E
-
Execute
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