Debug Interface
ARM DDI 0029G Copyright © 1994-2001. All rights reserved. 5-5
The ARM7TDMI processor has hardware extensions that ease debugging at the lowest
level. The debug extensions:
• allow you to halt program execution
• examine and modify the core internal state of the core
• view and modify the state of the memory system
• resume program execution.
5.2.3 Debug target
The major blocks of the debug target are shown in Figure 5-2.
Figure 5-2 ARM7TDMI block diagram
The ARM CPU core
This has hardware support for debug.
The EmbeddedICE Logic
This is a set of registers and comparators used to generate debug
exceptions such as breakpoints. This unit is described in About
EmbeddedICE Logic on page 5-13.
The TAP controller
This controls the action of the scan chains using a JTAG serial interface.
EmbeddedICE
Logic
Main processor
logic
TAP controller
Scan chain 2
Scan chain 1
Scan chain 0
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