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4.10 EOR – Bit-wise Exclusive-OR

Syntax:

EOR{<cond>}{S} <Rd>, <Rn>, <shifter_operand>

RTL:

if(cond)

Rd  Rn XOR shifter_operand

Flags updated if S used:

N, Z, C

Encoding:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cond 0 0 I 0 0 0 1 S Rn Rd shifter operand

Usage and Examples:

EOR R0, R0, #0x8000 ;toggle bit D15 of R0

4.11 LDM – Load Multiple

There are three distinct variants of the LDM instruction. Two of them are for use in

conjunction with exception processing, and are not described here. Further information

can be obtained in the ARM Architecture Reference Manual.

Syntax:

LDM{<cond>}<addressing_mode>, <Rn>{!}, <registers>

RTL:

if(cond)

start_address  Rn

for i = 0 to 14

if(register_list[i] == 1)

Ri  memory[next_address]

if(register_list[15] == 1)

PC  memory[next_address] & 0xFFFFFFFC

if(writeback)

Rn  end_address

Flags updated:

None

Encoding:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cond 1 0 0 P U 0 W 1 Rn register_list

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 42 43

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ARM ARM7TDMI User Manual Page 21