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4.32 STRH – Store Register Halfword

Syntax:

STRH{<cond>} <Rd>, <addressing_mode>

RTL:

if(cond)

memory[memory_address]  Rd[15:0]

if(writeback)

Rn  end_address

Flags updated:

None

Encoding:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cond 0 0 0 P U I W 0 Rn Rd addr_mode 1 0 1 1 addr_mode

Usage and Examples:

The STRH instruction stores the least significant halfword (2 bytes) of a register to

memory. See the section

Miscellaneous Load/Store Addressing Modes

for a description

of the available addressing modes.

STRH R0, [R1], #2 ;memory[R1] = R0, R1 = R1 + 2

STRH R0, [R1, #-2] ;memory[R1 – 2]=R0, R1 unchanged

4.33 SUB - Subtract

Syntax:

SUB{<cond>}{S} <Rd>, <Rn>, <shifter_operand>

RTL:

if(cond)

Rd  Rn - shifter_operand

Flags updated if S used:

N, Z, V, C

Encoding:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cond 0 0 I 0 0 1 0 S Rn Rd shifter operand

Usage and Examples:

SUBS R0, R0, #1 ;decrements R0, updates flags

SUB R0, R0, R0, ASR #2 ;multiply R0 by 0.75

Note that the carry flag (C) is the complement of a borrow flag. If a borrow is required

by the operation, C will be set to 0.

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ARM ARM7TDMI User Manual Page 35