Dual Timer/Counters
15-2 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
15.1 About the ARM Dual-Timer module (SP804)
The ARM Dual-Timer module is an Advanced Microcontroller Bus Architecture
(AMBA) compliant System-on-Chip (SoC) peripheral developed, tested, and licensed
by ARM Limited. For more information, see the AMBA Specification (Rev 2.0).
The release state of the ARM Dual-Timer module used in the ARM926EJ-S
Development Chip is SP804-r1p0. The base address for the Dual-Timer control
registers are
0x101E2000
and
0x101E3000
.
The module is an AMBA slave module and connects to the core APB. The Dual-Timer
module consists of two programmable 32/16-bit down counters that can generate
interrupts on reaching zero.
15.1.1 Features
The features of the Dual-Timer module are:
• Compliance to the AMBA Specification (Rev 2.0) for easy integration into an SoC
implementation.
• Two 32/16-bit down counters with free-running, periodic, and one-shot modes.
• Common clock with separate clock-enables for each timer gives flexible control
of the timer intervals.
• Interrupt output generation on timer count reaching zero.
• Identification registers that uniquely identify the Dual-Timer module. These can
be used by software to automatically configure itself.
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