Debugging Your System
5-12 Copyright © 2001 ARM Limited. All rights reserved. ARM DDI 0234B
5.4 Debug interface
The ARM7TDMI-S processor debug interface is based on IEEE Std. 1149.1- 1990,
Standard Test Access Port and Boundary-Scan Architecture. Refer to this standard for
an explanation of the terms used in this chapter, and for a description of the TAP
controller states.
5.4.1 Debug interface signals
There are three primary external signals associated with the debug interface:
• DBGBREAK and DBGRQ are system requests for the ARM7TDMI-S core to
enter debug state
• DBGACK is used by the ARM7TDMI-S core to flag back to the system that it is
in debug state.
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